Can someone explain to me how bit memory is assigned in S7 Ladder
Can someone explain to me how bit memory is assigned in S7 Ladder
There are three bit-type tables you need to understand. All are addressed in the same manner. Inputs from hardware devices are in the "I" table. Hardware outputs are stored in the "Q" table. Internal memory is found in the "M" table.
For each type, the address format is Ix.y, Qx.y, and Mx.y, where "x" is the byte number and "y" is the bit number (0 - 7). For example, the first I/O card in the PLC rack typically has addresses I0.0, I0.1, I0.2...I0.7, I1.0, I1.1,..I1.7, for a 16-point input card.
Thanks, That I understand, however when writing ladder logic and I want to assign an output as a memory bit in order to create a latch, is it just a matter of assigning e.g M0.0 in the symbols table as a marker for Q4.0 or do I have to create a line of logic to tie the memory bit to the output.
You will need to assign a rung of logic to set Q4.0 to the value of M0.0.